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This is from my textbook that describes how processor trigger exception handler:

and it says that:

The processor then triggers the exception by making an indirect procedure
call, through entry k of the exception table, to the corresponding handler. Figure 8.3 shows how the processor uses the exception table to form the address of the appropriate exception handler. The exception number is an index into the exception table, whose starting address is contained in a special CPU register called the exception table base register.

so my question is, where does the actual code of exception handler reside ? in kernel? and what about the exception table base register, is its content an adreess in kernel?

This is a little out of my depth, but I found this Wikipedia article: Interrupt descriptor table. Quoting from there:

[In real mode], in the 8086 processor, the interrupt table ... always resides at the same location in memory, ranging from 0x0000 to 0x03ff. On the 80286 and later, the size and locations of the IVT can be changed. ... The protected mode IDT may reside anywhere in physical memory.

Regardless of where the exception table resides, I'm certain that it is memory reserved by the kernel, and likewise the exception handling functions are defined in the kernel source code; e.g. traps.c and related.

Other references for further information related to but also going beyond this exact question:

https://0xax.gitbooks.io/linux-insides/content/Interrupts/linux-interrupts-5.html
https://www.oreilly.com/library/view/understanding-the-linux/0596005652/ch04s05.html
http://en.tldp.org/LDP/khg/HyperNews/get/devices/exceptions.html

NOTE: I am assuming we are talking about the x86 architecture here. As the Wikipedia article mentions, other chip architectures are likely to be similar, especially conceptually, but are also likely to differ in the details.