call macro twice in foreach call in Make
I have a macro that calls a target for each seed:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)), $(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)))
endef
Is there a way I can call two different targets, one followed by the other? This one calls my FIRST_TARGET_NAME for every seed with the TEST_TARGET_MACRO.
Something like this...
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)), $(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME), $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME)))
endef
so that it will eval the first call and then the second call for each seed.
I couldn't seem to find a way to do this.... or find anything online
foreach makefile macros
add a comment |
I have a macro that calls a target for each seed:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)), $(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)))
endef
Is there a way I can call two different targets, one followed by the other? This one calls my FIRST_TARGET_NAME for every seed with the TEST_TARGET_MACRO.
Something like this...
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)), $(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME), $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME)))
endef
so that it will eval the first call and then the second call for each seed.
I couldn't seem to find a way to do this.... or find anything online
foreach makefile macros
add a comment |
I have a macro that calls a target for each seed:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)), $(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)))
endef
Is there a way I can call two different targets, one followed by the other? This one calls my FIRST_TARGET_NAME for every seed with the TEST_TARGET_MACRO.
Something like this...
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)), $(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME), $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME)))
endef
so that it will eval the first call and then the second call for each seed.
I couldn't seem to find a way to do this.... or find anything online
foreach makefile macros
I have a macro that calls a target for each seed:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)), $(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)))
endef
Is there a way I can call two different targets, one followed by the other? This one calls my FIRST_TARGET_NAME for every seed with the TEST_TARGET_MACRO.
Something like this...
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)), $(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME), $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME)))
endef
so that it will eval the first call and then the second call for each seed.
I couldn't seem to find a way to do this.... or find anything online
foreach makefile macros
foreach makefile macros
asked Nov 14 '18 at 0:44
jimmyhuang0904jimmyhuang0904
123
123
add a comment |
add a comment |
1 Answer
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I'm not really sure what you're trying to do, but why can't you just write the eval/call twice? Like this:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
Here's my simple, complete example:
TEST_TARGET_MACRO = all:: ; $(info 1=$1 2=$2 3=$3 4=$4)
define MY_MACRO
$(foreach seed, $(shell seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
$(call MY_MACRO,foo,bar,2,5)
and here's the output which is just what I'd expect:
1= foo 2= bar 3= 2 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 2 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 3 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 3 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 4 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 4 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 5 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 5 4= SECOND_TARGET_NAME
make: 'all' is up to date.
This is what I want to do, and I tried this, but it seems like only the FIRST_TARGET_NAME is being called and not the SECOND_TARGET_NAME.
– jimmyhuang0904
Nov 16 '18 at 18:52
Well, you'll have to provide a SSCCE sscce.org then because I created a sample makefile here with a simple definition for TEST_TARGET_MACRO and it worked just as I'd expect.
– MadScientist
Nov 16 '18 at 22:15
add a comment |
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1 Answer
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active
oldest
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1 Answer
1
active
oldest
votes
active
oldest
votes
active
oldest
votes
I'm not really sure what you're trying to do, but why can't you just write the eval/call twice? Like this:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
Here's my simple, complete example:
TEST_TARGET_MACRO = all:: ; $(info 1=$1 2=$2 3=$3 4=$4)
define MY_MACRO
$(foreach seed, $(shell seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
$(call MY_MACRO,foo,bar,2,5)
and here's the output which is just what I'd expect:
1= foo 2= bar 3= 2 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 2 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 3 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 3 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 4 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 4 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 5 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 5 4= SECOND_TARGET_NAME
make: 'all' is up to date.
This is what I want to do, and I tried this, but it seems like only the FIRST_TARGET_NAME is being called and not the SECOND_TARGET_NAME.
– jimmyhuang0904
Nov 16 '18 at 18:52
Well, you'll have to provide a SSCCE sscce.org then because I created a sample makefile here with a simple definition for TEST_TARGET_MACRO and it worked just as I'd expect.
– MadScientist
Nov 16 '18 at 22:15
add a comment |
I'm not really sure what you're trying to do, but why can't you just write the eval/call twice? Like this:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
Here's my simple, complete example:
TEST_TARGET_MACRO = all:: ; $(info 1=$1 2=$2 3=$3 4=$4)
define MY_MACRO
$(foreach seed, $(shell seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
$(call MY_MACRO,foo,bar,2,5)
and here's the output which is just what I'd expect:
1= foo 2= bar 3= 2 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 2 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 3 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 3 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 4 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 4 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 5 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 5 4= SECOND_TARGET_NAME
make: 'all' is up to date.
This is what I want to do, and I tried this, but it seems like only the FIRST_TARGET_NAME is being called and not the SECOND_TARGET_NAME.
– jimmyhuang0904
Nov 16 '18 at 18:52
Well, you'll have to provide a SSCCE sscce.org then because I created a sample makefile here with a simple definition for TEST_TARGET_MACRO and it worked just as I'd expect.
– MadScientist
Nov 16 '18 at 22:15
add a comment |
I'm not really sure what you're trying to do, but why can't you just write the eval/call twice? Like this:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
Here's my simple, complete example:
TEST_TARGET_MACRO = all:: ; $(info 1=$1 2=$2 3=$3 4=$4)
define MY_MACRO
$(foreach seed, $(shell seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
$(call MY_MACRO,foo,bar,2,5)
and here's the output which is just what I'd expect:
1= foo 2= bar 3= 2 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 2 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 3 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 3 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 4 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 4 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 5 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 5 4= SECOND_TARGET_NAME
make: 'all' is up to date.
I'm not really sure what you're trying to do, but why can't you just write the eval/call twice? Like this:
define MY_MACRO
$(foreach seed, $(shell $(SHELL_EXPORT) seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
Here's my simple, complete example:
TEST_TARGET_MACRO = all:: ; $(info 1=$1 2=$2 3=$3 4=$4)
define MY_MACRO
$(foreach seed, $(shell seq $(3) $(4)),
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), FIRST_TARGET_NAME)
$(eval $(call TEST_TARGET_MACRO, $(1), $(2), $(seed), SECOND_TARGET_NAME))))
endef
$(call MY_MACRO,foo,bar,2,5)
and here's the output which is just what I'd expect:
1= foo 2= bar 3= 2 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 2 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 3 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 3 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 4 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 4 4= SECOND_TARGET_NAME
1= foo 2= bar 3= 5 4= FIRST_TARGET_NAME
1= foo 2= bar 3= 5 4= SECOND_TARGET_NAME
make: 'all' is up to date.
edited Nov 16 '18 at 22:17
answered Nov 14 '18 at 5:34
MadScientistMadScientist
47k55268
47k55268
This is what I want to do, and I tried this, but it seems like only the FIRST_TARGET_NAME is being called and not the SECOND_TARGET_NAME.
– jimmyhuang0904
Nov 16 '18 at 18:52
Well, you'll have to provide a SSCCE sscce.org then because I created a sample makefile here with a simple definition for TEST_TARGET_MACRO and it worked just as I'd expect.
– MadScientist
Nov 16 '18 at 22:15
add a comment |
This is what I want to do, and I tried this, but it seems like only the FIRST_TARGET_NAME is being called and not the SECOND_TARGET_NAME.
– jimmyhuang0904
Nov 16 '18 at 18:52
Well, you'll have to provide a SSCCE sscce.org then because I created a sample makefile here with a simple definition for TEST_TARGET_MACRO and it worked just as I'd expect.
– MadScientist
Nov 16 '18 at 22:15
This is what I want to do, and I tried this, but it seems like only the FIRST_TARGET_NAME is being called and not the SECOND_TARGET_NAME.
– jimmyhuang0904
Nov 16 '18 at 18:52
This is what I want to do, and I tried this, but it seems like only the FIRST_TARGET_NAME is being called and not the SECOND_TARGET_NAME.
– jimmyhuang0904
Nov 16 '18 at 18:52
Well, you'll have to provide a SSCCE sscce.org then because I created a sample makefile here with a simple definition for TEST_TARGET_MACRO and it worked just as I'd expect.
– MadScientist
Nov 16 '18 at 22:15
Well, you'll have to provide a SSCCE sscce.org then because I created a sample makefile here with a simple definition for TEST_TARGET_MACRO and it worked just as I'd expect.
– MadScientist
Nov 16 '18 at 22:15
add a comment |
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